For a given node technology, increasing integrated circuit (IC) size typically increases the functionality that can be included on a chip. Unfortunately, defects often scale with chip area. A large chip is more likely to incorporate a defect than is a smaller chip. Defects affect yield, and yield loss often increases with increasing chip size. Various techniques have been developed to provide large ICs at desirable yield levels.
One approach to providing large ICs is to construct a large IC out of multiple smaller ICs (dice) on a silicon interposer. The silicon interposer is essentially a substrate to which the dice are flip-chip bonded after the silicon interposer has been processed to provide metal wiring and contacts. For example, a silicon wafer is fabricated to form one or more silicon interposers with several patterned metal layers and intervening insulating layers connected to vias, as is commonly called “back-end processing”. Conventional conductive vias through the insulating layers connect the patterned metal layers together, and the dice are physically and electrically connected to the interposer with micro-bump arrays.
These patterned metal layers provide a high density interconnect pattern to the IC dice. The silicon interposer connects the fine-pitched dice to a coarser bump array on the opposite side of the interposer, and provides interconnects between dice. Conductive through-silicon vias (TSVs) extend through the silicon interposer to electrically connect the dice to a bump array on the opposite side of the silicon interposer. This bump array is used to electrically and mechanically connect the large IC to a patterned circuit board or packaging substrate.
Unfortunately, conductive TSVs are relatively expensive to fabricate and some techniques for TSVs, such as plated TSVs, introduce significant processing delays. For example, the use of through-plated TSVs may add two to three hours to the process flow of the large IC.
Providing large ICs that avoid the disadvantages of the prior art are desirable.